Joyen Benitto

Hello there, and welcome in.

I’m Joyen, an engineer who builds tools that build chips. This site is my lab notebook: things I’ve made, things I’m learning, and the occasional thought that wouldn’t leave me alone. Pull up a chair.

Now

  • SoC Design Engineer at InCore Semiconductors
  • Working at the intersection of programming languages, computer architecture and design automation
  • Writing notes and research ideas as I learn and think
  • Walking the streets with a Fujifilm X-M5, shooting street photographs in colour and in black and white
  1. macro_gen Dev Log #2: Sizing Combinational Logic by Logical EffortBlogs
  2. macro_gen Dev Log #1: Teaching a Computer to Size an Inverter, HonestlyBlogs
  3. Designing a topology DSL for NoC synthesisArchives
  4. A Pragmatic Left-Shift Methodology: Tools & Techniques for Exploring and Building Domain-Specific SoCsBlogs
  5. Too Many Rules, One Clock: Who Gets the Cycle?Blogs