Blog
Technical writing on hardware design, programming languages, and systems thinking.
2025-05-13
How to shift verification, exploration, and design entry left, catching
bugs at spec time instead of silicon time.
2025-04-08
Scheduling, ILP, and a Bluespec Bug That Ate 64 GB of RAM
From the formal theory of scheduling in architectural synthesis to a
production bug where an O(n²) ILP solver consumed 64 GB and 15 hours on
10,000 BVI signals.
2024-11-17
IP-XACT: The Hero We Need, the Villain We Deserve?
A deep dive into IP-XACT, exploring its role in modern SoC design and
why it’s both loved and feared by engineers.